1. Field of the Invention
This invention is directed to the packaging of integrated electronic chips. It is concerned, more particularly, with the direct packaging of such chips using light as the transmission medium for effecting interconnection to other circuits and/or devices.
2. Description of the Prior Art
Assorted packaging techniques and arrangements for connecting high density electronic circuit chips to other circuits or devices are well known in the prior art. Since their first commercial appearance, the constantly increasing circuit density of such chips applied continual pressure to those faced with solving the problems of making connections to appropriate points of all of the involved circuits in the diminishing space allowed therefor. As circuit density and heat generation in the modern electronic circuit chip increased, newer packaging techniques were attempted in an effort to overcome the problems posed by the challenge to place the most sophisticated electronic system in the smallest possible package.
Furthermore, the trend in integrated circuit fabrication toward multi-function chips by itself caused a dramatic increase in the number of eventual interconnections in the wiring network, printed circuit board or package in which the newer chips were to be used. In addition, the desire to increase rates of information processing and transfer compounded chip connection problems in that the number of permissible input/output (I/O) connections needed to obtain such higher rates were limited by the switching noise they would cause when utilized. Obviously, the switching of a large number of I/O connections at one time would cause sufficiently high levels of signal and switching noise to thereby adversely affect proper chip operation. While this problem was partially resolved by sequencing chip I/O operation, or by resorting to equivalent techniques, such solutions required additional circuitry and resulted in slower operation which fell far short of advantageously and fully using the denser chip capabilities.
Thus, the trend toward more extensive miniaturization, ever increasing circuit densities, higher transmission rates and greater processing speeds brought about reductions in available space for chip interconnections. This, in turn, caused a reduced sensitivity to signal interference, particularly I/O switching noise, as various attempts to accommodate the smaller interconnection space were made. Also, such interconnection requirements made it difficult, if not impossible, to effect field repair or to simply replace obsoleted chips. As a result, there arose a great need to provide more versatile chip packaging concepts which would accommodate the newest chips as they became available without unduly limiting the number of I/O connections that could be made thereto without interfering with relatively fast and easy field chip replacement.
U.S. Pat. No. 3,879,606, which issued to K. E. Bean, teaches a packaging concept which couples semiconductor chips to one another by providing a light conducting path and light responsive elements in the chips themselves. As necessary, a light source is used to illuminate a given light path whereupon the light responsive semiconductor devices in that light path are actuated thereby coupling the desired devices. This capability was intended to avoid short circuits and/or stray capacitance problems in the chip package. U.S. Pat. No. 3,969,816, which issued to R. C. Swengel Sr., describes an interconnection system for bonded wires which utilizes optical conductors. Also of interest are the patents which issued to J. M. Cutchaw concerning leadless packages for high density integrated circuit chips. These patents (U.S. Pat. Nos. 3,904,262; 4,063,791; 4,164,003 and 4,166,665) represent a continuing effort to provide a readily demountable connector for chip packages which would meet current and future packaging demands, including those of chip cooling and interconnection.
Unfortunately, these and other similar prior art efforts were not fully effective in solving the aforementioned packaging problems. There still remained the I/O noise switching problem posed by the sheer number of interconnections to be made and the heat dissipation problem arising out of the power needs and usage of the modern multi-function chips. In addition, greater life expectancy for any chip packaging design was not achievable where each new chip generation spawned a host of packaging concepts which addressed only the immediate problems of a particular chip configuration. Furthermore, it became apparent that it would be highly beneficial to provide chip connectors which would be capable of handling the chips directly in a single level packaging approach rather than using chip packages or modules to which the external connections were made.